Reducing PCB design costs: From schematic capture to PCB layout~Schematic capture packages contain various tools and features that make the process of entering a schematic and documenting a circuit easy on the designer. One common feature among popular schematic capture packages is an array of libraries. Another is the ability to output netlists that are compatible with various simulation and PCB layout packages. The schematic capture process creates a database of symbolized parts and a netlist describing the connections between the symbols. PCB layout packages have their own suite of tools and features designed to streamline the creation, verification, and documentation of a physical printed circuit board. All the board designer needs to do is define the outline of the board, add footprints from a decal library, import the netlist, and route the connections. Netlist comparisons will verify that the board matches the schematic. Online error checking warns of open- or short-circuit conditions. Design rules can be set up to check things such as matched net lengths, routing stubs, and parallelism. Sounds simple, doesn’t it? Draw a schematic, output the netlist, and sit back to wait for your prototype assemblies. Simple, that is, until the call from the assembly shop tells you that a part does not match its footprint, or you spend hours tracking down a diode or capacitor that was laid out backwards. An understanding of the process that takes place when exporting a schematic netlist is necessary to ensure your board layout will be correct.

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